The present disclosure relates to semiconductor devices and methods of manufacturing the devices, and more particularly to power transistors using nitride semiconductor and methods of manufacturing the transistors.
In recent years, field effect transistors (FETs) using gallium nitride (GaN) semiconductor have been actively researched as high-frequency high-power devices. GaN can form various alloys with aluminum nitride (AlN) and indium nitride (InN). Therefore, similar to conventional arsenic semiconductor such as gallium arsenide (GaAs) semiconductor, a heterojunction can be formed.
In particular, a heterojunction of nitride semiconductor has the feature that carriers at high concentration are generated at a junction interface by spontaneous polarization or piezoelectric polarization even without doping. As a result, when made of nitride semiconductor, a FET tends to be of a depression type (a normally-on type) and characteristics of an enhancement type (a normally-off type) are difficult to obtain. However, at present, most devices used in power electronics markets are of a normally-off type, and a normally-off type is strongly demanded in a FET using GaN nitride semiconductor.
A normally-off FET can be formed by shifting a threshold voltage toward a positive direction by, e.g., burying a gate portion. (See, for example, T. Kawasaki et al., Solid State Devices and Materials 2005 tech. digest, 2005, p. 206.) A method of forming a FET on the (10-12) plane of a sapphire substrate not to cause a polarization electric field in a crystal growth direction of nitride semiconductor is known. (See, for example, M. Kuroda et al., Solid State Devices and Materials 2005 tech. digest, p. 470.) Furthermore, a junction field effect transistor (JFET) including a p-type GaN layer formed in a gate portion is also suggested as an expected structure for realizing a normally-off FET. (See, for example, Japanese Patent Publication No. 2005-244072.) In a JFET structure, piezoelectric polarization occurring at a hetero interface between a channel layer made of undoped GaN and a barrier layer made of AlGaN is cancelled by piezoelectric polarization occurring at a hetero interface between the barrier layer made of AlGaN and a p-type GaN layer. This reduces two dimensional electron gas concentration directly under the gate portion in which the p-type GaN layer is formed, thereby providing normally-off characteristics. Moreover, by using for a gate, a pn junction with higher built-in potential than a Schottky junction, a rising voltage of the gate can be increased to reduce a gate leak current even when a positive gate voltage is applied.